Rigid-flex and HDI
Stack-up regions, the folded 3D view, and HDI via spans.
A rigid-flex board is one KiCad board whose parts have different stack-ups: rigid areas with all copper layers and a
flex tail with two. The extension keeps the board a plain .kicad_pcb that KiCad opens, and adds what KiCad has no
place for in <board>.kicad_flex.json next to it:
- Stack-up regions are rule areas named
flex:<id>on a user layer “Flex regions” (nothing kept out, so KiCad ignores them for DRC); the JSON gives each one its kind (rigid, flex, rigid-flex transition), its layer stack top to bottom with thicknesses and materials, the copper layers absent there, coverlay (top / bottom, opening margin) and a stiffener (side, material, thickness, outline). Where no region is, the Board Setup stack-up applies. - Bend lines are lines on User.Drawings in a group
flex:bend:<id>; the JSON gives the inner radius, the signed angle (+ folds the far side up) and the folding order. - Via spans (HDI) are the via definitions of the stack-up: through, blind, buried or micro, from / to layers, size and drill, laser, stacked or staggered (with a minimum offset), maximum aspect ratio and minimum annular ring.
Board Setup ▸ Board Stackup ▸ Stack-up Regions lists the regions (name, kind, layer set, materials, coverlay and stiffener, derived thickness): New region draws an outline with the region tool, Edit stack shows the region’s stack with a presence toggle per layer, Add bend draws a bend line, and Fold preview opens the 3D view. On the canvas regions are tinted and hatched by kind with their name, layers and thickness, and bend lines are dashed with “R · angle · #order” and their bend zone; Appearance ▸ Layers ▸ Flex shows or hides them. The 3D tab’s Fold section folds the flex regions about their bend lines: a slider from flat to folded, Folded / Flat (animated), all bends together or in order, Check folded clearance (rigid regions and part bodies that collide once folded but not flat, as markers) and Export of the folded or flat board as glb or PNG.
Board Setup ▸ Board Stackup ▸ Via Spans is the one page for spans: the table (kind, layers, size, drill, laser,
stacked, the aspect ratio from the stack-up depth and the annular ring, red when over a limit), Add span (the
next free adjacent layer pair), Drill per span, then the Span rules section: per-span limits, the allowed
layer pairs and the .kicad_dru rules they make. Write span rules writes them as SPAN: <id> rules so
kicad-cli reports the same vias (as items_not_allowed, drill_out_of_range and annular_width). Constraints ▸
Physical links to the page. When spans are defined the router changes layers only through a span (the shortest
legal one); in the route tool Alt+V cycles the spans usable from the current layer and V places that one. Vias
are written with KiCad’s own grammar ((via blind …), (via micro …) with their (layers from to)).
Checks (native DRC, whole board; Board Setup ▸ Violation severity):
| Rule | What | Severity |
|---|---|---|
flex_layer_absent | copper on a layer the region at that point does not have | error |
flex_component_on_bend | a footprint’s courtyard crosses a bend line or its bend zone | warning |
flex_folded_clearance | a collision that appears once folded (Check folded clearance, edsnx flex fold) | warning |
via_span_invalid | a via whose layer pair is not a defined span | error |
via_aspect_ratio | drilled depth / drill above the span’s maximum | error |
via_annular_span | annular ring below the span’s minimum | error |
micro_via_stacking | stacked vias where a span forbids stacking, or staggered closer than its minimum | error |
flex_bend_radius | bend radius below thickness × factor (IPC-2223: 6× one copper layer, 10× two, 20× more) | warning |
flex_copper_on_bend | a track crossing a bend more than 10° off perpendicular; solid copper on a bend | warning |
flex_stiffener_overlap | a stiffener reaching a bend line or ending too close to it | warning |
flex_coverlay_opening | an SMD pad in a coverlaid region with too small an opening | warning |
The factors and limits are the JSON’s rules (bendRadiusFactor, copperOnBend avoid / hatch / allow,
stiffenerOverlapMin, coverlayOpeningMin).
Fabrication: Drill per span (and edsnx project drill --per-span) writes one Excellon file per span or layer pair
(<board>-front-in1.drl, <board>-in1-in2.drl, … next to kicad-cli’s -PTH.drl / -NPTH.drl; laser microvias
apart when the pair also has drilled blind vias), the drill map <board>-drill-spans.rpt, and adds the drill files to
the .gbrjob. The drill table of the documentation sheets gets a Span column.
edsnx flex describe examples/rigid-flex-sample/rigid-flex.kicad_pcb
edsnx flex fold examples/rigid-flex-sample/rigid-flex.kicad_pcb --state folded --out folded.glb
edsnx flex check examples/rigid-flex-sample/rigid-flex.kicad_pcb
edsnx flex span list test/fixtures/hdi/hdi6.kicad_pcb
edsnx flex span add board.kicad_pcb --from In1.Cu --to In2.Cu --kind micro
edsnx flex span rules board.kicad_pcb # SPAN: rules into the .kicad_dru
edsnx project drill board.kicad_pcb --per-spanexamples/rigid-flex-sample is a 4-layer board with two rigid parts and a 2-layer flex tail with two bend lines
(90° and −90°), a hatched GND pour on the flex and a tall capacitor near the first bend; its build.sh rebuilds it
with edsnx only. The native DRC reports nothing; kicad-cli reports only extra_footprint (the sample’s schematic is
an empty placeholder, so schematic parity finds every footprint extra).